ATMEGA88PA-MU

The ATmega48A/PA/88A/PA/168A/PA/3 28/P provides the following featur es: 4K/8Kbytes of In-System Programmable Flash with Re ad-While-Write capabilitie s, 256/512/512/1K bytes EEPROM, 512/1K/1K/2Kbytes SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a seri al programmable USART, a by te-oriented 2-wire Serial Interface, an SPI serial port, a 6-channel 10-bit ADC (8 channels in TQFP and QFN/MLF packages), a programmable Watchdog Ti mer with internal Oscillator, and five soft ware selectable power saving modes. The Idle mode stops the CPU while allowin g the SRAM, Timer/Counters, USART, 2-wire Serial Interface, SPI port, and interrupt system to continue func tioning. The Power-down mode saves th e register contents but freezes the Oscillator, disabling all othe r chip functions until the nex t interrupt or hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise dur ing ADC conversions. In Standby mode , the crystal/resona tor Oscillator is running while the rest of the device is sleeping. This allows very fast start- up combined with low power consumption.